Welcome！[Sign In] ！[Sign Up]！
Front-page it | Collect it | [中国-简体中文]
FAQ Fav
Location:
Search - verilog programs

Search list

[VHDL-FPGA-Verilog] circuit_simulate

Description: c语言写的一个分析电路级别 模拟电路输入输出的小程序 原数字电路用Verilog语言描述-c language to write an analysis of circuit-level analog input and output of small programs of the original Verilog language to describe digital circuits
Platform: | Size: 3072 | Author: 苹果 | Hits:

[VHDL-FPGA-Verilog] vga256_success

Description: Verilog HDL语言编写的256色VGA显示程序，引脚分配适用于21EDA的EP2C8Q208开发板 程序中的PLL分频子模块为我上传的另一代码：PLL_50MHz_to_25MHz.rar-Verilog HDL language, 256-color VGA display program, pin assignment for the 21EDA the EP2C8Q208 development board programs. The PLL frequency sub-module is in another code I uploaded: PLL_50MHz_to_25MHz.rar
Platform: | Size: 737280 | Author: LM | Hits:

[VHDL-FPGA-Verilog] ModelSim_chinese

Description: ModelSim全套中文手册 东西还挺全的 个人觉得对初学者而言还是挺有必要看看的-Getting Started tutorial Amy FPGA series of experiments a number of entry-e-studio programs verilog
Platform: | Size: 1138688 | Author: 应清 | Hits:

[Embeded-SCM Develop] XHdl

Description: 将vhdl语言编写的程序转换成verilog程序的经典软件-Programs written in the vhdl verilog program into a classic software
Platform: | Size: 3958784 | Author: dayong | Hits:

[VHDL-FPGA-Verilog] MES-15

Description: verilog sample programs
Platform: | Size: 1932288 | Author: mmc | Hits:

[VHDL-FPGA-Verilog] ex15_logic_analysis

Description: 逻辑分析仪用FPGA实现，基于Verilog HDL的程序实现-Logic analyzer using FPGA, Verilog HDL-based programs to achieve
Platform: | Size: 5900288 | Author: 樊依林 | Hits:

[VHDL-FPGA-Verilog] ledwater_2

Description: 流水灯程序，verilog语言写的，在飓风II 开发板上验证过，流水灯，超炫-Light water programs, verilog language, and Hurricane II development board verified, water lights, stunning! ! !
Platform: | Size: 274432 | Author: 谷向前 | Hits:

[VHDL-FPGA-Verilog] jing-dain--FPGA-cheng-xu

Description: 关于FPGA的经典算法，包括数码管的编程和显示，用Verilog HDL语言写的程序，在开发板上已经测试成功！-Classical algorithm on the FPGA, including digital programming and display, using Verilog HDL language to write programs, the development board has been tested successfully!
Platform: | Size: 514048 | Author: chenfeihu | Hits:

[VHDL-FPGA-Verilog] XHDL4[1].0.40

Description: 实现VHDL和verilog之间的语言转换，方便程序之间的以致，XHDL版本4.0.40。-Achieved between VHDL and verilog language conversion between programs so easy, XHDL version 4.0.40.
Platform: | Size: 7668736 | Author: 星星 | Hits:

[VHDL-FPGA-Verilog] FPGA

Description: Verilog学习例程\EP2C5，内有跑马灯等18个程序-Verilog learning routines \ EP2C5, marquees and other 18 programs
Platform: | Size: 2122752 | Author: 杨靖 | Hits:

[MiddleWare] VGA_Proj_Picture

Description: verilog 语言写的VGA程序 可以参考一下-VGA verilog language written programs can reference
Platform: | Size: 822272 | Author: wns | Hits:

[Other] The-Verification-Cookbook

Description: 高级验证方法学，本书包括两个部分：主题和应用程序。主题部分包括实例，应用程序包括System C和System Verilog AVM库-Advanced verification methodology, this book includes two parts: theme and application. Topics include examples, application programs including System C and System Verilog AVM Library
Platform: | Size: 2503680 | Author: wudezhi | Hits:

[Other] small_pgm

Description: Small programs in verilog
Platform: | Size: 3072 | Author: Usha Shankar | Hits:

[VHDL-FPGA-Verilog] verilog_example

Description: verilog的小程序集合，适合与初学者学习参考-The verilog small collection of programs suitable for beginners to learn reference
Platform: | Size: 6144 | Author: 夏洪超 | Hits:

[Embeded-SCM Develop] assignment-1

Description: verilog coding assignment for basic programs
Platform: | Size: 22528 | Author: Nisha | Hits:

[VHDL-FPGA-Verilog] SMBus

Description: 快速傅里叶反变换的verilog源码程序，512点，适用于Quartus2开发环境。-Inverse fast Fourier transform Verilog source programs, 512, for development environment Quartus2.
Platform: | Size: 863232 | Author: kidd | Hits:

[VHDL-FPGA-Verilog] ADTLC549

Description: ADTLC549测量电压实验程序，为电压的采集，ADTLC549的驱动程序，为verilog编写的程序-The ADTLC549 measuring voltage experimental procedure for the acquisition of the voltage, driver ADTLC549 programs written in verilog
Platform: | Size: 555008 | Author: lsw | Hits:

[VHDL-FPGA-Verilog] UDP

Description: 这是用Verilog HDL编写的程序 利用UDP方法实现四位加法器-This is written in Verilog HDL programs Use UDP method four adder
Platform: | Size: 44032 | Author: 姚远 | Hits:

[VHDL-FPGA-Verilog] addr_rtl

Description: 利用Verilog HDL编写程序 利用assign语句实现加法器-Use Verilog HDL to write programs Using the assign statement adder
Platform: | Size: 32768 | Author: 姚远 | Hits:

[VHDL-FPGA-Verilog] Five

Description: 用Verilog语言写程序，实现对初始时钟的五分频-Verilog language used to write programs, one-fifth of the clock frequency
Platform: | Size: 5084160 | Author: 潘小宾 | Hits:
« 1 2 3 45 »

CodeBus www.codebus.net